Emulator of noisy near-term superconducting architectures

Emulator of noisy near-term superconducting architectures

Introduction

The objective of this project is to develop classical algorithms that exploit our current understanding of noise in superconducting circuit architectures to design classical emulators of quantum processing units that run more efficiently the more imperfections are present in the device.

To reach our goal we will develop a mathematical model that captures the main features of the noise affecting the target hardware to later design a classical algorithm that exploit the mathematical structure of the noise to accelerate the running time of the emulator.

Objectives and impact

Understanding for which problems a quantum computer can outperform our traditional computing machines, when the transition to quantum advantage is expected to happen and which improvements are required to make it happen, become a question of paramount importance for the quantum computing industry and the public that this project will help elucidate.

Applicant:

Dr. Raul Garcia-Patron Sanchez
School of Informatics
University of Edinburgh