Cryogenic qubit control interface using analog/mixed-signal circuits and systems

Cryogenic qubit control interface using analog/mixed-signal circuits and systems

Introduction

A key aspect of all quantum technologies is the interface between the isolated qubits and the classical control and readout technology needed to operate them. Quantum computers require cryogenic electronics, the current QC leaders (Honeywell with ion traps at 10K, IBM and Google with superconducting circuits at 10mK) are using cryostats to reduce thermal noise. Control and readout signals need to be thermalized to the qubit environmental temperature. Quantum circuits require very weak signals (-100dBm or less) for coherent control. Conventional electronics operating at 300K require large power to obtain a good signal-noise ratio (SNR) over the thermal background noise, this signal is then strongly attenuated (about 60dB, i.e. 1E-6 at least) to maintain SNR. Integration of custom-made control and readout electronics near the qubits at cryogenic temperatures is needed in terms of scaling, speed, functionality, precision, and costs. The availability of custom-made cryoelectronic is a main contributor to implement scalable quantum error correction schemes.

This project proposes a proof-of-concept electronic analog and mixed-signal circuits for controlling cryogenic quantum processors, with a focus on data converters. Such control interface circuitry needs to be integrated heterogeneously to the cryogenic quantum devices, hence work physically close and ideally at the same temperature to empower real-world large-scale quantum computers with rapid feedback control. Such cryo-data-converter circuits must achieve extremely high performance while consuming lowest power to be compatible with present cryogenic refrigerators. These provisions require in-home cryo-control circuit design and assembly compared to their room temperature counterparts.

CryoCAS Block Diagram

Deliverable: 3 K control and readout electronics for qubits (pulsed 4-8 GHz microwaves of lengths 5-500 nsec, relatively low power (-30 dBm max)), initial target 4 DACs and 2 ADCs channels
For mK to K qubits (ions, spins, superconducting circuits)

Objectives and impact

Achieving the Hub’s objectives for near-term (NISQC) and long-term (UFTQC) technologies requires optimal control of the quantum circuits, while minimizing external noise and processing delays. Most of the quantum hardware is now operated cryogenically well below the minimum operating temperature of -55°C for military grade products, while the control hardware sits physically far away at room temperature and requires dedicated filtering and thermal attenuation schemes. Moving the electronic components close the quantum hardware will allow for higher gate fidelities (reduced latencies, less external noise) and enable qubit scaling (custom integrated circuits of small scale), hereby directly contributing to the Hubs’ overall success and wider quantum sector.

Applicant:

Dr Hadi Heidari
James Watt School of Engineering
University of Glasgow 

Collaborators:

Professor Martin Weides
James Watt School of Engineering
University of Glasgow 

Dr Vihar Georgiev
James Watt School of Engineering
University of Glasgow